Communications Register Unit

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Description

The Communications Register Unit (short CRU) is part of the TMS processor architecture (9900, 9995, and other processors). Initially I thought it was a specific chip on the board, but in fact it is best described as a synchronous 1-bit serial bus. In that sense it may be compared to the currently widespread I²C bus. In contrast, however, the CRU bus makes use of a 12-line parallel address bus (15-line for the 9995).

There are two roles for devices on the CRU bus:

  • CRU bus master (contained in the CPU)
  • CRU bus slave (contained in the other TMS chips)

All devices are attached in parallel to the CRU bus. The bus consists of the following lines:

  • 12 address lines (15 for the 9995)
  • CRUIN line (towards the master)
  • CRUOUT line (towards the slaves)
  • CRUCLK line (controlled by the master, used for write operations only)

The main purpose of this bus is to read and write single bits from or to the slaves, mostly representing some line state in a local or remote device, or used to activate or deactivate some component.

CRU bus devices usually have more than one state to be queried and offer more than a single line to be set or reset. To select the desired bit, an address is present on the address bus when the CRUCLK pulses. Only a few lines are required, so it is possible to use the remaining lines to represent a base address of the device. When these lines are set to such an address, a decoding logic may enable the device, and the remaining lines select the bit in the device. We provide some of these base addresses below.

The CRUCLK line is only used for write operations from the master to the slaves. For read operations it suffices to just put an address on the bus and read the CRUIN line. This also implies that read operations must not alter the state of the devices. (It is possible to create a device that senses read operations and changes its state accordingly, but following this comment this is definitely not advisable.) The CRUCLK signal is mainly used to tell the remote device that it should now put the value on CRUOUT on the appropriate latch.

The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the workspace register 12 (R12).

The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since A15 is not a proper address line of the processor! That is, we should be aware that the value in R12 is twice the address used in the CRU address counter.

Well-known base addresses

CRU addresses are usually configurable on the device board using DIP switches. Some addresses are well-known for specific devices.

Systems: 99/4, 99/4A, 99/8, Geneve

Address System Device
0800 99/* Super Space cartridge
0F00 99/* SGCPU mapper
1000 all IDE adapter, Myarc/Foundation memory expansion
1100 all Various disk controllers
1200 all Modem (TI)
1300 all Primary serial/parallel interface (RS232/PIO)
1400 99/* EVPC (Enhanced Video Processor Card)
1500 all Secondary serial/parallel interface (RS232/PIO)
1600 all USB Smartmedia
1700 all Hexbus interface
1800 99/* Thermal printer
1900 all EPROM programmer (TI), Myarc/Foundation memory expansion
1B00 all GPL "Future extension", HSGPL (High-Speed GPL card)
1C00 99/* Video controller card (TI)
1D00 99/* IEEE 488 controller card (TI)
1E00 all SuperAMS memory expansion, SGCPU SAMS emulation
1F00 all P-Code card
2700 99/8 Internal DSR