Difference between revisions of "Specifications"

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== Hardware Architecture of the Geneve 9640 ==
== Hardware Architecture of the Geneve 9640 ==


=== Memory Map ===
[[Geneve paged memory organization]]
 
{|
| 0 || 0 || . || . || . || . || . || . || address || 00..3f || 512 || on-board dram
|-
| 0 || 1 || . || . || . || . || . || . || address || 40..7f || 512 || on-board future expansion or Memex with Genmod
|-
| 1 || 0 || 0 || . || . || . || . || . || address || 80..9f || 256 || p-box
|-
| 1 || 0 || 1 || 0 || . || . || . || . || address || a0..af || 128 || p-box
|-
| 1 || 0 || 1 || 1 || 0 || . || . || . || address || b0..b7 || 64 || p-box
|-
| 1 || 0 || 1 || 1 || 1 || 0 || 0 || 0 || address || b8 || 8 || p-box address block 0000-1fff
|-
| 1 || 0 || 1 || 1 || 1 || 0 || 0 || 1 || address || b9 || 8 || p-box address block 2000-3fff
|-
| 1 || 0 || 1 || 1 || 1 || 0 || 1 || 0 || address || ba || 8 || p-box address block 4000-5fff
|-
| 1 || 0 || 1 || 1 || 1 || 0 || 1 || 1 || address || bb || 8 || p-box address block 6000-7fff
|-
| 1 || 0 || 1 || 1 || 1 || 1 || 0 || 0 || address || bc || 8 || p-box address block 8000-9fff
|-
| 1 || 0 || 1 || 1 || 1 || 1 || 0 || 1 || address || bd || 8 || p-box address block a000-bfff
|-
| 1 || 0 || 1 || 1 || 1 || 1 || 1 || 0 || address || be || 8 || p-box address block c000-dfff
|-
| 1 || 0 || 1 || 1 || 1 || 1 || 1 || 1 || address || bf || 8 || p-box address block e000-ffff
|-
| 1 || 1 || 0 || . || . || . || . || . || address || c0..df || 256 || on-board sram expansion
|-
| 1 || 1 || 1 || 0 || 0 || . || . || . || address || e0..e7 || 64 || on-board sram expansion
|-
| 1 || 1 || 1 || 0 || 1 || 0 || . || . || address || e8..eb || 32 || on-board sram expansion
|-
| 1 || 1 || 1 || 0 || 1 || 1 || . || . || address || ec..ef || 32 || on-board sram default
|-
| 1 || 1 || 1 || 1 || . || . || . || 0 || address || f0,2,4,..,e || 8 || on-board boot eprom 1
|-
| 1 || 1 || 1 || 1 || . || . || . || 1 || address || f1,3,5,..,f || 8 || on-board boot eprom 2
|}
 
   
The TI console (or more precise, the Flex Cable Interface) sets the AMA/B/C
lines to 1. Most cards actually check for AMA/B/C=1. However, this decoding
was forgotten in some designs which cause the card memory to be mirrored. The
usual DSR space at 0x4000-0x5fff which would be reachable via page 0xba is then
mirrored on a number of other pages:
   
10 xxx 010x = 82, 8a, 92, 9a, a2, aa, b2, ba
 
Another block to take care of is 0xbc which covers 8000-9fff since this
area contains the speech synthesizer port at 9000/9400.
   
For the standard Geneve, only prefix 10 is routed to the P-Box. The Genmod
modification wires these address lines to pins 8 and 9 in the P-Box as AMD and
AME. This requires all cards to be equipped with an additional selection logic
to detect AMD=0, AME=1. Otherwise these cards, although completely decoding the
19-bit address, would reappear at 512 KiB distances.
   
For the page numbers we get
   
standard:
00-3f are internal (DRAM)
40-7f are internal expansion, never used
80-bf are the P-Box address space
c0-ff are internal (SRAM, EPROM)
   
Genmod:
00-3f are the P-Box address space
40-7f are the P-Box address space
80-bf are the P-Box address space
c0-ef are the P-Box address space
f0-ff are internal (EPROM)

Latest revision as of 15:44, 14 August 2011

The common TI-99 setup comprises the console, and peripheral devices. In earlier years, peripheral devices like interfaces, memory expansion, or speech synthesizer were hooked next to each other at the peripheral port on the right side of the console, building up a chain of boxes which stretched beyond the ends of your desk (the Sidecar setup). Later, peripheral extensions were put into the Peripheral Expansion Box (PEB).

Hardware Architecture of the TI-99/4A

The TI-99/4A is a microcomputer system driven by one TMS9900 microprocessor.

The address bus is 16 bit wide, allowing for a maximum of 64 KiB of directly accessible memory, consisting of ROM, RAM, and special ports.

The data bus is 16 bit wide. However, most peripheral devices outside the console were connected by an 8 bit bus using a 16/8 bit converter (splitting one word in subsequent two bytes and vice versa). This led some people to falsely believe that the TI-99/4A was an 8-bit system (or "not a true 16 bit system").

One special feature of the TMS9900 processor (and comparable processors of this family) was that there are no hardware registers available for user programs. Instead, the TMS9900 uses a pointer to a set of 16 software registers with 16 bit width each in RAM. This workspace pointer (WP) may be set by user programs and allows to quickly replace the complete set of 16 registers which is especially useful for modular programming. Programs could allocate their own workspace area, move the WP to this area, and thus avoid to interfere with other programs.

In the TI home computer system family there was also a concept of port-based memory addressing. This allowed to considerably increase the useable memory by introducing new address spaces. Three of these memories are available:

  • Video memory: 16 KiB
  • GROM memory: 64 KiB (multiple ports allow to multiply this size)
  • Speech memory (within the Speech Synthesizer)

Hardware Architecture of the Geneve 9640

Geneve paged memory organization