Geneve logical memory map - Revision history

Mizapf: /* Memory map */

2021-01-28T20:59:57Z

Memory map

← Older revision		Revision as of 20:59, 28 January 2021
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	\| rowspan="1" class="descr" \| Hides mapped page up to F0FB (see above)		\| rowspan="1" class="descr" \| Hides mapped page up to F0FB (see above)
	\|-		\|-
	! ~~F100~~		! F0FC
	\| class="free" \| Free space ~~3834~~ bytes		\| class="free" \| Free space 3838 bytes
	\|-		\|-
	! FFFA		! FFFA

Mizapf: /* On-chip memory */

2021-01-28T20:59:14Z

On-chip memory

← Older revision		Revision as of 20:59, 28 January 2021
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	The on-chip memory of the TMS9995 consists of the address range F000-F0FB and FFFC-FFFF, 256 bytes. The latter four bytes are used for the NMI vector (formerly known as LOAD interrupt vector). The word at FFFA is the decrementer; it may be used as a memory storage when the decrementer is halted.		The on-chip memory of the TMS9995 consists of the address range F000-F0FB and FFFC-FFFF, 256 bytes. The latter four bytes are used for the NMI vector (formerly known as LOAD interrupt vector). The word at FFFA is the decrementer; it may be used as a memory storage when the decrementer is halted.

			The memory area is equipped with SRAM at 0 wait states, with full 16 bit access. It is the fastest RAM in the system. Hence, register workspaces should make good use of this area. In that respect, it resembles the Scratch pad RAM of the TI-99/4A.

	The on-chip RAM cannot be mapped in or out; it is always present at the specified logical addresses. According to the 9995 specifications, on-chip memory accesses are visible outside; the external address bus is set (only for the even address, as these are full 16-bit accesses), and unspecified data is output on the external data bus on write operations. This means that the hidden RAM is overwritten.		The on-chip RAM cannot be mapped in or out; it is always present at the specified logical addresses. According to the 9995 specifications, on-chip memory accesses are visible outside; the external address bus is set (only for the even address, as these are full 16-bit accesses), and unspecified data is output on the external data bus on write operations. This means that the hidden RAM is overwritten.

Mizapf: /* GPL mode */

2021-01-28T20:56:47Z

GPL mode

← Older revision		Revision as of 20:56, 28 January 2021
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	! F000		! F000
	\| rowspan="1" class="freeon" \| On-chip memory		\| rowspan="1" class="freeon" \| On-chip memory
	\| rowspan="1" class="descr" \| Hides mapped page		\| rowspan="1" class="descr" \| Hides mapped page up to F0FB (see above)
	\|-		\|-
	! F100		! F100

Mizapf: /* Native mode */

2021-01-28T20:55:47Z

Native mode

← Older revision		Revision as of 20:55, 28 January 2021
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	\|-		\|-
	! F000		! F000
	\| rowspan="1" class="freeon" \| On-chip memory ~~256~~ bytes		\| rowspan="1" class="freeon" \| On-chip memory 252 bytes
	\| rowspan="1" class="descr" \| Hides mapped page		\| rowspan="1" class="descr" \| Hides mapped page up to F0FB (see below)
	\|-		\|-
	! F100		! F100
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	\|-		\|-
	\|}		\|}

			=== On-chip memory ===

			The on-chip memory of the TMS9995 consists of the address range F000-F0FB and FFFC-FFFF, 256 bytes. The latter four bytes are used for the NMI vector (formerly known as LOAD interrupt vector). The word at FFFA is the decrementer; it may be used as a memory storage when the decrementer is halted.

			The on-chip RAM cannot be mapped in or out; it is always present at the specified logical addresses. According to the 9995 specifications, on-chip memory accesses are visible outside; the external address bus is set (only for the even address, as these are full 16-bit accesses), and unspecified data is output on the external data bus on write operations. This means that the hidden RAM is overwritten.

	=== Video ports ===		=== Video ports ===

Mizapf at 21:34, 26 January 2021

2021-01-26T21:34:05Z

← Older revision		Revision as of 21:34, 26 January 2021
Line 1:		Line 1:
	The logical address map determines which devices or memory areas appear in the logical address space. These are the addresses as seen from the CPU or the program that is run, but they need not correspond to the same physical address at all times. The correspondence is provided by the [[Geneve paged memory organization \| mapper]].		The logical address map determines which devices or memory areas appear in the logical address space. These are the addresses as seen from the CPU or the program that is run, but they need not correspond to the same physical address at all times. The correspondence is provided by the [[Geneve paged memory organization \| mapper]].

			The [[Geneve Memory Management Functions \| memory management ]] in Native mode is supported by a XOP call.

	== Native mode ==		== Native mode ==

Mizapf at 21:29, 26 January 2021

2021-01-26T21:29:40Z

← Older revision		Revision as of 21:29, 26 January 2021
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	\| class="mmap" \| Indirect video register access		\| class="mmap" \| Indirect video register access
	\|}		\|}

			[[Category:Geneve]]
			[[Category:Hardware]]

Mizapf: /* Memory map */

2021-01-26T21:12:10Z

Memory map

← Older revision		Revision as of 21:12, 26 January 2021
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	! F130		! F130
	\| [[Real-time clock \| Clock chip]]		\| [[Real-time clock \| Clock chip]]
	~~\| class="descr" \| See below~~
	\|-		\|-
	! F140		! F140

Mizapf at 21:10, 26 January 2021

2021-01-26T21:10:09Z

@@ Line 52: / Line 52: @@
 |-
 ! F130
-| Clock chip
+| [[Real-time clock | Clock chip]]
 | class="descr" | See below
 |-
@@ Line 99: / Line 99: @@
 | -
 | class="mmap" | Indirect video register access
 |}
@@ Line 189: / Line 137: @@
 |-
 ! 8010
-| Clock chip
+| [[Real-time clock | Clock chip]]
 |-
 ! 8020
@@ Line 273: / Line 221: @@
 | -
 | class="mmap" | Indirect video register access
 |}

Mizapf: /* Memory map */

2021-01-26T17:55:04Z

Memory map

← Older revision		Revision as of 17:55, 26 January 2021
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	\|-		\|-
	! 8020		! 8020
	\| rowspan="2" class="free" \| Free space		\| rowspan="2" class="free" \| Free space 992 bytes
	\| class="descr" \| Also includes the "PAD RAM" (16-bit RAM of the TI-99/4A)		\| class="descr" \| Also includes the "PAD RAM" (16-bit RAM of the TI-99/4A)
	\|-		\|-

Mizapf at 17:54, 26 January 2021

2021-01-26T17:54:05Z

← Older revision		Revision as of 17:54, 26 January 2021
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	\|-		\|-
	! A000		! A000
	\| rowspan="3" class="free" \| Free space 24 KiB		\| rowspan="3" class="free" \| Free space 20 KiB
	\|-		\|-
	! C000		! C000
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	\|-		\|-
	! F100		! F100
	\| class="free" \| Free space		\| class="free" \| Free space 3834 bytes
	\|-		\|-
	! FFFA		! FFFA