Communications Register Unit - Revision history

Mizapf at 20:44, 6 April 2022

2022-04-06T20:44:04Z

← Older revision		Revision as of 20:44, 6 April 2022
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	The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since A15 is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.		The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since A15 is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.

			One of the most important devices in the TI-99/4A console that is connected to the CRU is the [[Programmable System Interface]] (TMS9901).

	== Well-known base addresses ==		== Well-known base addresses ==

Stephen Shaw: add link to Terminology#workspace

2014-10-02T18:09:27Z

add link to Terminology#workspace

← Older revision		Revision as of 18:09, 2 October 2014
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	The CRUCLK line is only used for write operations from the master to the slaves. For read operations it suffices to just put an address on the bus and read the CRUIN line. This also implies that read operations '''must not alter''' the state of the devices. (It is possible to create a device that senses read operations and changes its state accordingly, but following this comment this is definitely not advisable.) The CRUCLK signal is mainly used to tell the remote device that it should now put the value on CRUOUT on the appropriate latch.		The CRUCLK line is only used for write operations from the master to the slaves. For read operations it suffices to just put an address on the bus and read the CRUIN line. This also implies that read operations '''must not alter''' the state of the devices. (It is possible to create a device that senses read operations and changes its state accordingly, but following this comment this is definitely not advisable.) The CRUCLK signal is mainly used to tell the remote device that it should now put the value on CRUOUT on the appropriate latch.

	The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[workspace register]] 12 (R12).		The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[Terminology#W\|workspace register]] 12 (R12).

	The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since A15 is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.		The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since A15 is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.

Stephen Shaw: remove link to missing page (A15) - possibly an accidental link.

2014-10-02T17:48:18Z

remove link to missing page (A15) - possibly an accidental link.

← Older revision		Revision as of 17:48, 2 October 2014
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	The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[workspace register]] 12 (R12).		The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[workspace register]] 12 (R12).

	The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since [[A15]] is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.		The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since A15 is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.

	== Well-known base addresses ==		== Well-known base addresses ==

Mizapf: /* Description */

2011-07-21T20:47:37Z

Description

← Older revision		Revision as of 20:47, 21 July 2011
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	* CRUIN line (towards the master)		* CRUIN line (towards the master)
	* CRUOUT line (towards the slaves)		* CRUOUT line (towards the slaves)
	* CRUCLK line (controlled by the master)		* CRUCLK line (controlled by the master, used for write operations only)

	The main purpose of this bus is to read and write single bits from or to the slaves, mostly representing some line state in a local or remote device, or used to activate or deactivate some component.		The main purpose of this bus is to read and write single bits from or to the slaves, mostly representing some line state in a local or remote device, or used to activate or deactivate some component.

	CRU bus devices usually have more than one state to be queried and offer more than a single line to be set or reset. To select the desired bit, an address is present on the address bus when the CRUCLK pulses. Only a few lines are required, so it is possible to use the remaining lines to represent a base address of the device. When these lines are set to such an address, a decoding logic may enable the device, and the remaining lines select the bit in the device. We provide some of these base addresses below.		CRU bus devices usually have more than one state to be queried and offer more than a single line to be set or reset. To select the desired bit, an address is present on the address bus when the CRUCLK pulses. Only a few lines are required, so it is possible to use the remaining lines to represent a base address of the device. When these lines are set to such an address, a decoding logic may enable the device, and the remaining lines select the bit in the device. We provide some of these base addresses below.

			The CRUCLK line is only used for write operations from the master to the slaves. For read operations it suffices to just put an address on the bus and read the CRUIN line. This also implies that read operations '''must not alter''' the state of the devices. (It is possible to create a device that senses read operations and changes its state accordingly, but following this comment this is definitely not advisable.) The CRUCLK signal is mainly used to tell the remote device that it should now put the value on CRUOUT on the appropriate latch.

	The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[workspace register]] 12 (R12).		The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[workspace register]] 12 (R12).

Mizapf at 10:37, 20 July 2011

2011-07-20T10:37:04Z

← Older revision		Revision as of 10:37, 20 July 2011
Line 1:		Line 1:
			== Description ==

			The Communications Register Unit (short CRU) is part of the TMS processor architecture (9900, 9995, and other processors). Initially I thought it was a specific chip on the board, but in fact it is best described as a '''synchronous 1-bit serial bus'''. In that sense it may be compared to the currently widespread I²C bus. In contrast, however, the CRU bus makes use of a 12-line parallel address bus (15-line for the 9995).

			There are two roles for devices on the CRU bus:

			* CRU bus master (contained in the CPU)
			* CRU bus slave (contained in the other TMS chips)

			All devices are attached in parallel to the CRU bus. The bus consists of the following lines:

			* 12 address lines (15 for the 9995)
			* CRUIN line (towards the master)
			* CRUOUT line (towards the slaves)
			* CRUCLK line (controlled by the master)

			The main purpose of this bus is to read and write single bits from or to the slaves, mostly representing some line state in a local or remote device, or used to activate or deactivate some component.

			CRU bus devices usually have more than one state to be queried and offer more than a single line to be set or reset. To select the desired bit, an address is present on the address bus when the CRUCLK pulses. Only a few lines are required, so it is possible to use the remaining lines to represent a base address of the device. When these lines are set to such an address, a decoding logic may enable the device, and the remaining lines select the bit in the device. We provide some of these base addresses below.

			The CRU has a particular role in the TMS architecture; there are dedicated machine commands to control input and output via the CRU bus. The bus master (CPU) is also capable of doing a multi-bit transfer by iterating the bit transfer while increasing the initially set address on each CRUCLK pulse. The initial address is contained in the [[workspace register]] 12 (R12).

			The value of R12 is loaded into the address counter of the CRU master; the 12 bits are A3-A14. Note that A15 is not usable as a CRU address since [[A15]] is not a proper address line of the processor! That is, we should be aware that the value in R12 is '''twice''' the address used in the CRU address counter.

	== Well-known base addresses ==		== Well-known base addresses ==

Mizapf at 18:25, 18 July 2011

2011-07-18T18:25:23Z

← Older revision		Revision as of 18:25, 18 July 2011
Line 2:		Line 2:

	CRU addresses are usually configurable on the device board using DIP switches. Some addresses are well-known for specific devices.		CRU addresses are usually configurable on the device board using DIP switches. Some addresses are well-known for specific devices.

			Systems: 99/4, 99/4A, 99/8, Geneve

	{\| class="plain"		{\| class="plain"
Line 9:		Line 11:
	\|-		\|-
	\| 0800		\| 0800
	\| ~~all~~		\| 99/*
	\| Super Space cartridge		\| Super Space cartridge
	\|-		\|-
	\| 0F00		\| 0F00
	\| ~~all~~		\| 99/*
	\| SGCPU mapper		\| SGCPU mapper
	\|-		\|-
Line 23:		Line 25:
	\| all		\| all
	\| Various disk controllers		\| Various disk controllers
			\|-
			\| 1200
			\| all
			\| Modem (TI)
	\|-		\|-
	\| 1300		\| 1300
	\| all		\| all
	\| ~~Serial~~/parallel interface (RS232/PIO)		\| Primary serial/parallel interface (RS232/PIO)
	\|-		\|-
	\| 1400		\| 1400
	\| ~~all~~		\| 99/*
	\| EVPC (Enhanced Video Processor Card)		\| EVPC (Enhanced Video Processor Card)
	\|-		\|-
	\| 1500		\| 1500
	\| all		\| all
	\| ~~Second~~ serial/parallel interface (RS232/PIO)		\| Secondary serial/parallel interface (RS232/PIO)
	\|-		\|-
	\| 1600		\| 1600
	\| all		\| all
	\| USB Smartmedia		\| USB Smartmedia
			\|-
			\| 1700
			\| all
			\| Hexbus interface
			\|-
			\| 1800
			\| 99/*
			\| Thermal printer
	\|-		\|-
	\| 1900		\| 1900
	\| all		\| all
	\| Myarc/Foundation memory expansion		\| EPROM programmer (TI), Myarc/Foundation memory expansion
	\|-		\|-
	\| 1B00		\| 1B00
	\| all		\| all
	\| HSGPL (High-Speed GPL card)		\| GPL "Future extension", HSGPL (High-Speed GPL card)
			\|-
			\| 1C00
			\| 99/*
			\| Video controller card (TI)
			\|-
			\| 1D00
			\| 99/*
			\| IEEE 488 controller card (TI)
	\|-		\|-
	\| 1E00		\| 1E00

Mizapf at 18:18, 18 July 2011

2011-07-18T18:18:03Z

@@ Line 11: / Line 11: @@
 | all
 | Super Space cartridge
 |-
 | 0F00
@@ Line 46: / Line 22: @@
 | 1100
 | all
-| Disk controller
+| Various disk controllers
 |-
 | 1300
@@ Line 67: / Line 39: @@
 | all
 | USB Smartmedia
 |-
 | 1900
 | all
 | Myarc/Foundation memory expansion
 |-
 | 1B00
 | all
 | HSGPL (High-Speed GPL card)
 |-
 | 1E00
@@ Line 103: / Line 55: @@
 | all
 | P-Code card
 |-
 | 2700
 | 99/8
+| Internal DSR
 |-
 |}

Mizapf at 18:14, 18 July 2011

2011-07-18T18:14:04Z

← Older revision		Revision as of 18:14, 18 July 2011
Line 38:		Line 38:
	\| 0F00		\| 0F00
	\| all		\| all
	\|		\| SGCPU mapper
	\|-		\|-
	\| 1000		\| 1000
	\| all		\| all
	\|		\| IDE adapter, Myarc/Foundation memory expansion
	\|-		\|-
	\| 1100		\| 1100
	\| all		\| all
	\|		\| Disk controller
	\|-		\|-
	\| 1200		\| 1200
Line 54:		Line 54:
	\| 1300		\| 1300
	\| all		\| all
	\|		\| Serial/parallel interface (RS232/PIO)
	\|-		\|-
	\| 1400		\| 1400
	\| all		\| all
	\|		\| EVPC (Enhanced Video Processor Card)
	\|-		\|-
	\| 1500		\| 1500
	\| all		\| all
	\|		\| Second serial/parallel interface (RS232/PIO)
	\|-		\|-
	\| 1600		\| 1600
	\| all		\| all
	\|		\| USB Smartmedia
	\|-		\|-
	\| 1700		\| 1700
Line 78:		Line 78:
	\| 1900		\| 1900
	\| all		\| all
	\|		\| Myarc/Foundation memory expansion
	\|-		\|-
	\| 1A00		\| 1A00
Line 86:		Line 86:
	\| 1B00		\| 1B00
	\| all		\| all
	\|		\| HSGPL (High-Speed GPL card)
	\|-		\|-
	\| 1C00		\| 1C00
Line 98:		Line 98:
	\| 1E00		\| 1E00
	\| all		\| all
	\|		\| SuperAMS memory expansion, SGCPU SAMS emulation
	\|-		\|-
	\| 1F00		\| 1F00

Mizapf at 18:04, 18 July 2011

2011-07-18T18:04:07Z

@@ Line 3: / Line 3: @@
 CRU addresses are usually configurable on the device board using DIP switches. Some addresses are well-known for specific devices.
-{| class="twocol"
+{| class="plain"
 |-
 | 0800
 | Super Space cartridge
 |-
 | 1000
 |-
 |}

Mizapf at 17:56, 18 July 2011

2011-07-18T17:56:57Z

← Older revision		Revision as of 17:56, 18 July 2011
Line 3:		Line 3:
	CRU addresses are usually configurable on the device board using DIP switches. Some addresses are well-known for specific devices.		CRU addresses are usually configurable on the device board using DIP switches. Some addresses are well-known for specific devices.

	{\| class="~~cruaddr~~"		{\| class="twocol"
	\|-		\|-
	\| 0800		\| 0800